Memory (DRAM) performance is all about the relationship between speed and latency. While the two are closely related, they’re not connected in the way you might think. Here’s how speed and latency are related at a technical level – and how you can use this information to optimize your memory’s performance.

• Many users believe CAS latency is an accurate indicator of real world latency performance

• Many users also believe that since CAS latencies increase with speed gains, some of the speed gets nullified

The difference between the perception of latency and true latency comes down to how latency is ultimately defined and measured.

The true definition of latency and the latency equation

At a basic level, latency refers to the time delay between when a command is entered and executed. It’s the gap between the two. Because latency is all about this gap, it’s important to understand what happens after a command is issued. When the memory controller tells the RAM to access a particular location, the data must go through a number of clock cycles in the Column Address Strobe in order to get to its desired location and “complete” the command. With this in mind, there are two variables that determine a module’s latency:

• The total number of clock cycles the data must go through (measured in CAS Latency, or CL, on data sheets)
• The duration of each clock cycle (measured in nanoseconds)

Combining these two variables gives us the latency equation:

The latency paradox

Latency is often misunderstood because on product flyers and spec comparisons, it’s noted in CL, which is only half of the latency equation. Since CL ratings only indicate the total number of clock cycles, they don’t have anything to do with the duration of each clock cycle, and thus, they shouldn’t be extrapolated as the sole indicator of latency performance.

By looking at a module’s latency in terms of nanoseconds, you can best judge if one module is, in fact, more responsive than another. To calculate a module’s true latency, multiply clock cycle duration by the total number of clock cycles. These numbers will be noted in official engineering documentation on a module’s data sheet. Here’s what these calculations look like.

In the history of memory technology, as speeds have increased, clock cycle times have decreased, resulting in lower true latencies as technology has matured, even though there are more clock cycles to complete. What’s more, since speeds are increasing and true latencies are remaining roughly the same, you’re able to achieve a higher level of performance using newer, faster, and more energy efficient memory.

At this point in the discussion, we need to note that when we say “true latencies are remaining roughly the same, ” we mean that from DDR3-1333 to DDR4-2666 (the span of modern memory), true latencies started at 13.5ns and returned to 13.5ns. While there are several instances in this range where true latencies increased, the gains have been by fractions of a nanosecond. In this same span, speeds have increased by over 1, 300 MT/s, effectively offsetting any trace latency gains.

Which is more important: speed or latency?

Based on in-depth engineering analysis and extensive testing in the Crucial Performance Lab, the answer to this classic question is speed. In general, as speeds have increased, true latencies have remained approximately the same, meaning faster speeds enable you to achieve a higher level of performance. True latencies haven’t necessarily increased, just CAS latencies. And CL ratings are an inaccurate, and often misleading, indicator of true latency (and memory) performance.

Optimize your system by installing as much memory as possible, using the latest memory technology, and choosing modules with as much speed as is cost-effective and/or relevant for the applications you’re using.

AND THE ANSWER IS!

SPEED